Impact of Gate engineering on Analog, RF Performance of Nanoscale Barriered TM-Heterostructure DG-MOSFET

In this paper, the authors have analyzed Analog, RF and Linearity performance of barriered TM-Heterostructure DG-MOSFET using TCAD device simulation. The model analyzes the effect of gate structure made up of triple material on the electrical performance of the device for variation in potential and Electric Field. The effect of gate engineering on the various Analog and RF performance of a TM-Heterostructure DG MOSFET is thoroughly investigated. For several triple material gates with the ratios 1:1:1, 1:2:3, and 3:2:1, a complete analysis of figures of merit such as transconductance (gm), output resistance (Ro), cut-off frequency (fT), and maximum frequency of oscillation (fmax) is conducted.. We observed from the comparative study that performance of nanoscale TM-DG heterostructure MOSFET gets affected by varying gate length ratio of the device.