Design of CNTFET based Ternary Subtractor using Unary Operators

The Ternary logic, a Multiple-valued Logic(MVL), which is an alternative approach of the conventional Binary logic has gained the attention of VLSI designers because of its advantages of higher operating speeds, lesser chip area and reduced interconnects. The principal aim of Multi-threshold design can be achieved by using of Carbon Nanotube Field Effect Transistors (CNTFETs) by incorporating the scalable threshold voltages of it. The article proposes a CNTFET deployed Ternary Half Subtractor and Full Subtractor with improved Energy consumption. The paper also uses Unary operators for improving its performance. Simulations are done in CNTFET 32nm technology at 900mv for realizing the performance metric of the circuits in the terms of Energy consumption.