Low-resource CNN Accelerator Based on FPGA

Convolutional Neural Networks (CNNs) are deployed on the Internet of Things (IoT) edge devices with strict restrictions on resource and power consumption. Most of the work's optimization focuses on inference speed and average precision, ignoring resource and power consumption optimization. This paper proposes the strategies of weight quantization, parameter reordering, block convolution multiplexing, and
$\text{CONV}+\text{POOL}$
‘ to implement an FPGA-based CNN accelerator with low-resource and low-power. The CNN algorithm is designed in High Level Synthesis tool (HLS), which can realize the FPGA development with high-level language to achieve high development efficiency and flexibility. The experimental results show that our implementation has achieved 2.812W of low power consumption for executing YOLOV2 on the PYNQ-Z2, consuming only 2052Kb of on-chip BRAMs, which is better than the current work in terms of resource consumption. The performance is about 42.31GOP/s, which is much higher than CPU (ARM-A9).