Ferroelectric and Interlayer Co-optimization with In-depth Analysis for High Endurance FeFET

In face of the critical endurance issue, for the first time we take a holistic perspective to co-optimize the ferroelectric materials and interlayer in FeFET. Compared to the common HZO based gate stack, the novel combination of Hf
0.95
Al
0.05
O
2
+Al
2
O
3
enhances the endurance to $\gt 5 \times 10 ^{9}$ cycles while maintaining a retention > 10 years. In-depth analysis based on DFT and DQSCV reveal the reduction of interlayer electric field and interface charge trapping as the mechanism of optimization. We also develop a distributed interface trap model to correlate different trapping dynamics with the interlayer property in each device. This work pushes forward the understanding and development of high endurance strategy for FeFET.