41% Reduction In Power Stage Area On Silicon-On-Insulator Bipolar-CMOS-DMOS-IGBT Platform With Newly Developed Multiple Deep-Oxide Trench Technology

A newly developed $\underline{m}$ultiple $\underline{d}$eep-$\underline{o}$xide ${t}$rench (MDOT) technology is demonstrated for Bipolar-CMOS-DMOS-IGBT (BCDI) platform in this paper. MDOT is inserted in the drift region and high-voltage interconnection (HVI) region for area saving through assisting in voltage blocking. The MDOT technology can be applied to various SOI power devices such as lateral IGBT (LIGBT), lateral free-wheeling diode (LFWD) and lateral DMOS (LDMOS). At the voltage of 500V, the drift length $(L_{d})$ of the high-voltage silicon-on-insulator (SOI) LIGBT can be shortened from $47 \mu m$ to $21.5 \mu m$ and the area of power stage in the single-chip intelligent power IC can be shrunk by 41.1%, allowing significant reduction in size for single-chip intelligent power ICs.