Preliminary Study on Noise-Resilient Artificial Neural Networks for On-Chip Test Generation

In this paper, we propose a builtin test pattern generation mechanism that can contain artificial neural networks (ANNs) as the test pattern generator (ANN-TPG). The primary concern of implementing the ANN-TPG is the noise issue. Therefore, we propose a model that considers the noise as the noise layers in ANNs. We also reveal the accuracy of the test pattern generation by the ANN-TPG with considering the noise affection.