Wafer Warpage Optimization Via Finite Element Analysis for a 3D Chiplet Package

This paper presents a numerical study using Finite Element Analysis modelling approach to predict the wafer warpage during a 3D chiplet package fabrication process. To mitigate the wafer warpage, virtual Design-of-Experiment (DOE) is conducted numerically on the material selection among a group of molding compound, dielectric materials as well as the wafer carrier. Furthermore, the parametric study on thermomechanical properties namely modulus and CTE for molding compound is performed to assess the respective influence on the wafer warpage. Based on the results, recommendations on the suitable molding compound thermomechanical properties are proposed for the current Chiplet package design. Furthermore, the numerical model is validated by the experimental measurements of the wafer warpage. The comparison shows that the adoption of viscoelastic properties also helps improve the modelling results accuracy.