Optimization of annealing process to realize RDL layers on high topography wafer for heterogeneous integration

Encapsulation (TFE) [1], [2] of a radio-frequency microelectromechanical systems (RF MEMS) device with rerouting of contacts and pads for flip-chip compatibility to a much smaller CMOS chip. This article explains why peeling of RDL layers takes place and how it can be resolved by optimizing annealing process of polyimide layers. This work demonstrates wafer-level thin film