Solder Joint Reliability Assessment on FO-CSP for Next Generation DDR6

In this paper, in order to understand the possibility of applying small form factor, fan-out chip scale package (FOCSP), for next generation DDR6 products, solder joint reliability (SJR) has been studied. The results indicate CTE mismatch between PCB and FOCSP may have greater reliability impact than tuning redistributed layer (RDL) of package. Final results indicate that with low CTE gap, high Cu stud height and thin base die thickness exhibit optimum SJR performance within this experiment. The failure modes of these test vehicles oftentimes occur at the Cu RDL crack at corner neck, and IMC/solder fracturing. With large CTE gap, the IMC cracking exhibit near package side, and whereas, with small CTE gap, the stress will shift, and the IMC cracking will occur near PCB board side.