An 8-Bit 625MS/s SAR ADC for Sensor Application

This paper presents an 8-bit 625MS/s SAR ADC for integrated sensor application. To enhance ADC conversion speed, the proposed SAR ADC generates 2-bit in one comparison cycle based on asynchronous mode, combining with two DAC arrays, SIG DAC and REF DAC. In addition, extra 1bit redundant is adopted to eliminate SIG DAC incomplete settling. By using a low kickback noise comparator with background offset calibration and minimizing the logic delay in the SAR decision loop, our ADC can achieve SNDR of 46.59 dB at 625MS/s rate under 1.2V supply voltage and maintain an ENOB higher than 7 bit up to Nyquist frequency.