A Simulation Study of Si/SiGe Dual Insulator Double Gate Heterostructure Junctionless FET (DI-DG-HJL-FET) for RF Applications

This paper propounds the RF characteristics of an improved Double Gate Junctionless FET (JL-DG-FET). Here, we have studied a Dual Insulator Double Gate Heterostructure Junctionless FET (DI-DG-HJL-FET) structure which exhibits an enhancement in the subthreshold slope (SS) and
$I_{on}/I_{off}$
ratio. The DI-DG-HJL-FET device is studied using two-dimensional simulations to analyze the effect of implementing doping engineering and incorporating a Dual Insulator (DI) structure in the RF parameters. The
$Si_{1-x}Ge_{x}$
layer of DI-DG-HJL-FET has a lower doping density as compared to the strained silicon layer. The doping engineering not only reduces the SS but also increases the
$I_{on}/I_{off}$
for 20 nm channel length. The
$DI-DG- \text{HJL}$
-FET device offers a peak transconductance
$(g_{m})$
and cut-off frequency
$(f_{t})$
of 3600
$\mu S/\mu m$
and 750 GHz respectively, at a gate length of 20 nm. The results of the DI-DG-HJL-FET structure insinuate it as a promising device for future RF applications.