A 17ns 64K CMOS RAM with a schmitt trigger sense amplifier

This paper will describe a CMOS SRAM using a four-transistor cross-coupled flip-flop memory cell with a high resistivity load composed of the second poly-Si. Cell is 12.5μm
× 21.5μ
m. Die is 3.86mm×6.99mm that can De packaged in a 300 mil wide 22 pin plastic DIP.