Double threshold MOSFETs in bird's-beak free structures

Edge effects found in MOSFET channels fabricated by a new bird's-beak-free process are studied by two-dimensional simulation. Test devices are also fabricated using the side wall masked isolation (SWAMI) process, and electrical characristics are measured. At the sharp corners of active- to field region boundaries, threshold lowering occurs because of electric field concentration. The effective channel width associated with the threshold voltage is very narrow ranging from 0.05 um or less to 0.3 um. Both the threshold and the effective width depend on the shape of the corner, and have weaker dependence on the substrate and surface impurity concentrations and substrate bias, than those of the planar surface devices. The optimization of MOS devices with bird's-beak free structure for conventional applications with very tight design rules is discussed. A three-transistor static memory cell utilizing the double threshold (DT) MOST is proposed and analyzed.