High-speed CMOS-to-ECL pad driver in 0.18 /spl mu/m CMOS

In this paper, we present a CMOS-to-ECL converter and pad driver, to provide true negative ECL outputs from a positive-supply CMOS ASIC. The circuit exploits negative feedback loops to precisely set the output voltages corresponding to 0 and 1 logic ECL levels, and a high speed current switch to allow a bit rate of hundreds of Mb/s. Simulations using 0.18 /spl mu/m CMOS technology show a bit-rate in excess of 1 Gb/s, with high tolerance to temperature, load resistance and capacitance values.