Design of a neuro-fuzzy chip using adaptive multimode approaches for an intelligent car-backing system

This paper presents a new approach to design an adaptive multimode neuro fuzzy chip (AMNFC) with on-chip learning and highly efficient resource utilization capabilities for a car-backing system. The design process is performed by a high-level datapath synthesis that is based on an optimal scheduling and a resource allocation algorithm. A novel data flow graph (DFG) scheduling algorithm suitable for parallel structure computation has been developed for designing a neuro-fuzzy chip. The proposed algorithm fulfills two major objectives. First, it simultaneously optimizes both the schedule and allocation of functional units, registers, and multiplexers with respect to a minimal cost of the hardware resources and the total time of execution. Second, it implements an adaptive multimode neural-fuzzy system with reconfiguration capability. Computer simulations and experimental results have successfully validated the effectiveness of the proposed design approach for a car-backing system.

1 Introduction

Recently, many researchers have concentrated to realize intelligent systems such as neural networks, fuzzy logic systems as well as neuro-fuzzy systems into hardware implementations [1], [2]. The focuses have been directed to exploit the advanced design methodologies and implementation technologies by investigating the intrinsic characteristics such as regularity, fault tolerance, and adaptivity. Moreover, hardware efficiency in terms of high-speed computation, minimal-size of area, low-power consumption as well as flexible reconfiguration has been highly stressed in existing dedicated computing hardware design [3]–[6]. However, in the past ten years, general-purpose intelligent devices still have not been accepted by the market due to several reasons. These include limited flexibility, insufficient technical and software support, and unsatisfactory performance [7].