I. Introduction
DELAY elements are widely used to manipulate timing in both digital and analog circuits. A delay buffer is often inserted between flip flops to satisfy setup and hold time requirements in digital systems. A self-timed dynamic logic family, such as clock-delayed domino logic, uses a delay element to match the propagation time of the clock to that of the signal. A delay locked loop (DLL) in an analog system uses a voltage controlled delay line (VCDL) for clock synchronization. In switched-capacitor circuits, a delay element is used to generate non-overlapping clock.