1. Introduction
The continuous advances of microelectronic technology are shrinking device dimensions to the sub-micron region, leading to a reduction of transistor dimensions and power supply voltages, which make possible the implementation of systems ever faster and more complex [1], [2]. However, scaling is also bringing weaker circuits. In fact, the amount of charge stored in the circuit internal nodes is becoming smaller, as well as circuits' noise margins (because of the reduction of power supply voltages). Therefore, circuits are becoming more susceptible to noise sources, such as cosmic ray neutrons or Alpha-particles [3]. When these particles hit the silicon bulk, they create minority carriers which, if collected by the source/drain diffusions, could change the voltage value of such nodes producing a transient fault (TF) [4]. Depending on the TF height and duration, as well as on the electrical characteristics of the affected circuit, the fault may either be filtered out by the fan-out gates, or result in a soft error [5], possibly compromising the system's correct operation in the field, with a consequent dramatic impact on availability. Additionally, with the scaling of global interconnection lines, also crosstalk faults (CFs) are becoming increasingly more likely, with possible detrimental effects on system's performance and availability.