I. Introduction
Recently, There Has Been A growing interest in hardware implementation of random number generators (RNGs) for security applications. The RNG is used to create cryptographic keys, or initialization sequences for security protocols. RNGs are also needed in communication systems for spread-spectrum signaling, and it may be employed for applications that use Monte Carlo simulation. for some applications, pseudo random number generators (PRNGs) are used. The randomness requirements of such applications are not very rigorous, since PRNGs possess periodicity and can be mathematically predictable [1], [2]. Therefore, in most security applications the system must have a true random number generator. Modern cryptographic system also require that the RNG will be integrated on the chip, making it tamper-resistant. Several approaches have been used for on-chip RNG circuits [3], including: 1) resistive thermal-noise amplification; 2) sampling a high frequency stable oscillator with a low frequency unstable oscillator; and 3) discrete-time chaos. The first approach has a limited bandwidth due to 1/f noise at the low frequency range, the resistor resistance–capacitance (RC) as well as the Op-Amp gain-bandwidth product and the comparator switching speed at the high frequency range. The second may suffer from low entropy. However, the chaos-based RNG shows neither.