I. Introduction
Combined input-crosspoint buffered packet switches are an alternative to input-buffered switches to relax arbitration timing and to provide high-performance switching for packet switches with high-speed ports. These switches use time efficiently as input and output port selections are performed independently. As an example of the stringent timing, a switch with 40-Gbps (OC-768) ports transferring 64-byte packets must perform input (or output) arbitration within 12.8 ns. An input-crosspoint buffered switch can perform selection of a packet at inputs and outputs within this time. However, the number of buffers
This paper uses the terms queue and buffer interchangeably.
in a crossbar grows in the same order as the number of crosspoints, , where is the number of input/output ports. This makes implementation costly for a large buffer size or large . One way to keep the buffer complexity feasible is to use crosspoint buffers that are small in size.