Automatic modification of sequential circuits for self-checking implementation

In this paper we present a tool for the automatic insertion of the modifications required to make a general sequential circuit self-checking with respect to possible transient faults. In particular, our tool modifies the internal structure of the sequential circuit and adds proper encoders/decoders and checkers. A VHDL description of the obtained self-checking system is generated, that can be given to the input of a conventional synthesis tool. As an example we consider the case of the synthesis tool available within the Xilinx FPGA design framework. However, our developed software may be easily adapted to operate on the preamble of any other commercial synthesis tool.

1. Introduction

The continuous advances of microelectronics technology are shrinking device dimensions to the submicron region, leading to a reduction of transistor dimensions and power supply voltages, which make possible the implementation of systems ever faster and more complex [1], [4]. However, the amount of charge stored in the circuit nodes is becoming smaller, making the circuit more susceptible to noise sources, such as cosmic rays and a-particles originated by the decay of uranium and thorium impurities present within packages [16]. When these particles hit the silicon bulk, they create minority carriers which, if collected by the source/drain diffusions, could change the voltage value of such nodes producing a transient fault (TF) [13].