1. Introduction
Advantages such as reduced power dissipation, elimination of clock distribution issues, modularity, and improved performance have enabled asynchronous circuits to carve a widening niche in many systems previously dominated by synchronous circuits [16]. Nevertheless, widespread acceptance of asynchronous designs requires development of elaborate methods and advanced EDA solutions. Unlike their synchronous counterparts, which have enjoyed a high level of design automation since the mid-1970s, similar efforts for asynchronous circuits have not kept up to par. In conjunction with the inherently more difficult asynchronous style [2], [8], the lack of CAD support has deterred efforts not only in design but also in all other aspects of asynchronous circuit realization, including test. However, the recent resurgence of asynchronicity as a solution to several limitations encountered in submicron technology [16] has sparked new research efforts in test of asynchronous circuits [3], [4], [5], [3].