A hybrid analog/digital chaotic associative memory

A chaotic associative memory can be constructed by coupling a network of Chua's circuits via piecewise linear conductances as described in Jankowski, Londei, Mazur, and Lozowski [1995]. Synchronization and anti-synchronization of network voltages are used to store binary memory patterns. The chaotic network dynamics enable the memory to wander among patterns which have non-zero correlations with the input pattern. This paper describes an electronic proof-of-concept implementation of a small chaotic associative memory which utilizes a digital signal processor to implement the network coupling elements. Although further analysis is required, initial experimental results suggest that the memory is functional.