Mechanism of power dissipation capability of power MOSFET devices: comparative study between LDMOS and VDMOS transistors

Interaction between the electrical power and thermal energy generated due to power dissipation is fundamental in understanding the safe operating limit of semiconductor devices in both transient and steady-state operation. This work deals with the power dissipation process from the device structure aspects. The power dissipation capability of the lateral DMOS device is compared to that of the vertical DMOS device for a given technology through theoretical and experimental analyses. The comparative study in the transient power capability between two different device structures provides interesting clues to understand the problem of the power dissipation mechanics of the power devices.