I. Introduction
Technology scaling has traditionally enabled improvements in increasing performance, lowering energy consumption, and reducing the die cost. Along with feature miniaturization, process technologists have also introduced a number of novel materials and process steps in leading-edge manufacturing processes. Examples include the high- [1], [2] materials that are used for the transistor gate insulation from the channel, the low- materials for the implementation of the dielectrics in the metal stack, and the reintroduction of copper for the implementation of interconnect wires. Characterizing these materials and their interactions for reliability degradation mechanisms is an extremely complex task [3], [4]. Typically, they are used in commercial processes before full understanding of the physical degradation mechanisms is available. At the same time, the supply voltage scaling has been saturating to keep enough headroom between the transistor threshold voltage and the supply voltage, hence increasing the electric fields and stress conditions for these devices [3], [17]. Furthermore, effects that, in the past, have been considered second order are now becoming a clear threat for the parametric and functional operation of the circuits and systems in near-future technologies. Examples include progressive gate-oxide soft breakdowns (SBDs) of transistors (particularly dramatic in high- oxides) [3], negative bias temperature instability issues in the threshold voltage of the positive-channel metal–oxide–semiconductor transistors [5], electromigration problems in copper interconnects [6], and breakdown of dielectrics in porous low- materials [7].