Reliability of wafer level chip scale package (WLCSP) with 96.5Sn-3.5Ag lead-free solder joints on build-up microvia printed circuit board

In this study, time-temperature-dependent nonlinear analyses of lead-free solder bumped wafer level chip scale packages (WLCSP) on microvia build-up printed circuit board (PCB) assemblies subjected to thermal cycling conditions are presented. The lead-free solder considered is 96.5 wt.%Sn-3.5 wt.%Ag. The 62 wt.%Sn-36 wt.%Pb-2 wt.%Ag solder is also considered to establish a baseline. These two solder alloys are assumed to obey the Garofalo-Arrhenius steady-state creep constitutive law. The shear stress and shear creep strain hysteresis loops, shear stress history, shear creep strain history, and creep strain density range at the corner solder joint are presented for a better understanding of the thermal-mechanical behaviors of the lead-free solder bumped WLCSP on microvia build-up PCB assemblies.