Packaging of integrated power electronics modules using flip-chip technology

We present the use of flip-chip technology, widely used in IC packaging, for the fabrication of three-dimensional packaged integrated power electronics modules (IPEMs). In the flip-chip IPEM (FC-IPEM), power devices are bonded to the flexible substrate with circuit pattern for gate-drive components using triple-stacked solder bumps. The devices are encapsulated using underfill polymer materials to distribute thermomechanical stresses caused by mismatching coefficients of thermal expansion (CTEs) among the silicon chips and substrates. The power semiconductor dies are attached to direct-bond copper (DEC) substrate. The feasibility of this approach was demonstrated by constructing modules consisting of two IGBTs, two diodes, and simple gate driver and control circuit. The FC-IPEM was successfully tested at power levels up to 10 kW. The electrical test result shows that this three-dimensional area bond packaging structure has much lower parasitics than a commercial wire-bond module. Issues relating to materials and process design and selection for the construction of the packaged power module are presented along with some electrical and reliability test results and discussions.