A high-performance readout circuit (ROIC) for VLWIR FPAs with novel current mode background suppression

This study designs a 32×32 readout integrated circuit (ROIC) for N-on-P very long wavelength (VLWIR) detectors. The new ROIC has the ability to operate with current mode background suppression in two steps, and increases the integration time and the signal-to-noise ratio (SNR) of image data. To improve the linearity and provide tight control of the detector bias, a buffered direct injection (BDI) unit cell is used as input circuit. By means of a sample and hold circuit, the infrared focal plane array (IRFPA) can be operated in snapshot mode and rolling mode. The simulation results confirm these advantages. With the 5.0V power supply, the VLWIR ROIC provides the output dynamic range over 2.0V and the well capacity more than 1×10
⁸
e
⁻
. The skimming error is less than 0.5%. The final chip will be fabricated with HHNEC 0.35um 1P4M process technology, and the pixel occupies a 60um×60um area. It can be operated at the temperatures of 50K.