Performance optimization of multi-core processors using core hopping - thermal and structural

As the work load on the single core processor increases, its power density and the die temperature increases as well. The increase in the die temperature results in decreased performance, reliability and increased leakage currents and cooling cost. Also, the non-uniform power distribution across the die results in hot spots. In order to decrease the work load and the cooling cost on the single core processor, multi-core processors have been implemented. Multicore Processors also known as Chip Multi Processors (CMP's). CMPs are processors which contain two or more independent cores on a chip. In CMPs, if one core reaches its critical temperature, the workload is transferred to the other. This phenomenon is termed as core hopping. Core hopping facilitates uniform distribution of the work load among the many cores and leads to improvements in the performance and reliability. The demand for greater performance in applications involving high levels of computing has resulted in many cores being put on a single chip. Every succeeding processor is predicted to hold double the number of cores than the previous one. In this study, core hopping for CMPs is analyzed and the thermal analysis of the chip with core hopping is performed using ANSYS Fluent. The hop sequence is analyzed as a function of chip temperature distribution and a numerical methodology to analyze the coupled thermal and structural integrity of the CMPs is demonstrated.