1. Introduction
Reconfigurable architectures such as Field Programmable Gate Arrays (FPGA) have gained more and more importance in recent years. State of the Art SRAM-based FPGAs embed megabits of RAMs and plenty of configurable logic and routing resources, which makes it possible to implement a circuit composed of millions of gates. The possibility to integrate a complex Systems-on-Chip (SoC) on a single device, combining speedup of hardware with flexibility of software, the opportunity of practically unlimited reconfiguration in SRAM based FPGAs as well as drastically sinking prices, made FPGAs attractive for a wide variety of application domains. In special application domains such as space, FPGAs are becoming increasingly popular as they are inherently flexible to meet multiple requirements and offer significant performance and cost saving for such critical applications [1].