Characterization of a high temperature multichip SiC JFET-based module

This paper presents a SiC JFET-based, 200°C, 50 kW three-phase inverter module and evaluates its electrical performance. With 1200 V, 100 A rating of the module, each switching element is composed of four paralleled SiC JFETs with two anti-parallel SiC Shottky Barrier Diodes (SBDs). The substrate layout inside the module is designed to reduce package parasitics. Then, experimental static characteristics of the module are obtained over a wide range of temperature, and low on-state resistance is shown up to 200°C. The dynamic performance of this module is evaluated by double pulse test up to 150°C, under 650 V dc bus voltage and 60 A drain current, with different turn-on and turn-off gate resistances. The current unbalance phenomenon and phase-leg shoot-through problem are analyzed too. The results by simulation and experiments show that the causes of shoot-through are JFET inside parameters, package parasitics, and high temperature. The switching losses of this module at different temperatures are shown at the end.