Introduction
In flip-chip packaging structures, the relentless trend of shrinking the size of C4 (Controlled Collapsed Chip Connections) solder bumps for high performance devices is always accompanied by an increase in current density. EM studies of solder bumps under accelerated stressing conditions have demonstrated that the predicted lifetime can scatter very broadly and, therefore, possess significantly threat to the reliability of the C4 solder joint [1]–[6].