Design and implementation of three level CHB inverter with phase shifted SPWM using TMS320F24PQ

Multilevel inverter is emerging as a new breed of power inverter for high power applications, especially in FACTS controllers. This can develop high voltage with reduce harmonics through its own circuit topology. The power levels of the inverter are largely controlled by carrier frequency. For an air cooled design, the frequency is practically limited to 3 to 5 KHz. It is proposed to operate two inverters in parallel with phase shifted carrier due to difficulties in large power handling with a single inverter. Hence carrier frequency can be doubled and the output harmonics will be reduced. This paper proposes a phase-shifted SPWM (PS-SPWM) switching scheme in three level inverter. This can eliminate the bulky and weighty transformers and reduce power loss in STATCOM. This paper propose a design and hardware implementation of three phase three level cascaded H-bridge inverter with Phase Shifted SPWM. The simulation is carried out with PSIM. The Simulated results have been obtained for proposed circuits and THD components of these modulation techniques have been observed. A Hardware set up is also developed for the proposed topology by using DSP TMS320F24PQ based firing circuit. The results and analysis are discussed in the following subsection.