18 bit Delta-Sigma DAC in 0.18um CMOS process

The Delta-Sigma Digital-to-Analog Converter ( Δ - Σ) is designed in Verilog HDL for stereo video system. This DAC supports 16-bit or 18-bit input data and includes an 8x digital interpolation filter followed by a 64x oversampled delta-sigma modulator. The modulator output controls the reference voltage input to analog low-pass filter. The architecture allows for adjustment of sample rate by changing the master clock frequency. This DAC is implemented in 0.18um CMOS process with the advantages of lower power consumption and higher performances demonstrated by chip test. It has been successfully used in practice.