I. Introduction
Radio frequency (RF) and millimeter-wave (MMW) integrated circuits (ICs) continue to benefit from advances in deep submicron CMOS process technologies. Over the years, the monolithic CMOS transceiver chips with wider bandwidths have been developed to operate at frequencies up to 60 GHz. Moreover, CMOS RF SoC chips incorporate radio building blocks, including a power amplifier, an oscillator, and switches [1]. To obtain the desired gain performance of RF CMOS in MMW bands, the dual-gate configuration can improve output impedance and reduce feedback capacitance relative to those of a single-gate FET [2], [3]. However, output power density and surface traps, which induce low-frequency noise in deep submicron MOSFETs, are still the main limiting factors for MMW ICs applications. The authors have already applied field-plate (FP) technology to 0.13- nMOSFETs to improve their off-state drain-to-source leakage current and linearity [4]. To further investigate the deep submicron characteristics of MOSFETs, we proposed 90-nm dual-gate nMOSFETs with FP metal for high-power and low-noise applications. The FP metal of the signal input device was connected to the source terminal (FP–S) to obtain a uniform FP region at various input power levels. To suppress the FP-induced input capacitance further, the FP metal in the second gate was connected to the gate terminal (FP–G). FP dual-gate nMOS has an average of 3% better than the traditional dual-gate 90-nm nMOS. To determine the contribution of FP metals to the overall noise characteristics, the low-frequency noise of a 90-nm FP dual-gate nMOS was investigated as a function of frequency and gate bias. Finally, the load-pull power of the proposed devices was measured as a function of input power and drain-to-source voltage . The measurements showed that FP dual-gate nMOS had a better output power density than the traditional dual-gate 90-nm nMOS, particularly at high , owing to its high output resistance and fewer surface traps.