Experimental and Theoretical Analyses of the Electrical SOA of Rugged p-Channel LDMOS

Numerical TCAD and transmission line pulse analysis of an electrical safe operating area of a robust p-channel lateral DMOS transistor is performed. The observed independence of the trigger current on the applied gate-source voltage is attributed to a lack of quasi-saturation effect which is usually observed in an n-channel LDMOS. The dependence of the trigger voltage on the length of channel and drift regions is also analyzed, and the tradeoff with the specific on-resistance (R
_DSon
) is given.