Highly Stable Double-Gate Ga–In–Zn–O Thin-Film Transistor

We report the electrical stability of double-gate (DG) Ga-In-Zn-O thin-film transistors (TFTs). The threshold voltage (
VT
) shift of the DG TFT after 3 h of positive-bias temperature stress (
V
_GS
= + 20 V,
V
_DS
= + 0.1 V, and Temperature = 60°C) is as small as +2.7 V, while that of a conventional single-gate (SG) TFT is +6.6 V. The results of negative-bias temperature stress [(NBTS);
V
_GS
= - 20 V,
V
_DS
= + 10 V, and Temperature = 60°C] are more dramatic: The
VT
shift of the DG TFT is only +0.1 V, whereas that of the SG TFT is -9.1 V. With backlight illumination, the
VT
shift of the SG TFT under the same NBTS becomes severe ( -11.1 V). However, it remains as small as -0.7 V for the DG TFT.