I. Introduction
Metal gate electrodes and high- gate dielectrics are required instead of conventional poly-Si gate electrodes and SiON dielectrics to suppress gate depletion and gate leakage current increase, which are associated with the continued scaling of CMOS. A dual-metal-gate concept, in which two different conductive materials are used as gate electrodes for nFETs and pFETs, seems to be effective for obtaining two different effective work functions ('s) for nFETs and pFETs. However, as long as the gate-first process and a single high- dielectric such as HfSiON are employed, without other material incorporation such as La and Al [1]–[4], the difference between dual metal gates for nMOS and pMOS are actually much narrower than that between and poly-Si on (1.1 eV) [5], [6]. As a result, the threshold voltages of both nFETs and pFETs become unacceptably high. Moreover, it is very difficult to simultaneously etch dual-metal-gate electrodes that are composed of different conductive materials [7].