Highly scalable saddle MOSFET for high-density and high-performance DRAM

We proposed an MOS device structure with a recess channel and side gate, and characterized key features of the device through three-dimensional device simulation for the first time. Device characteristics with recess depth and source/drain doping were carefully investigated in terms of the threshold voltage (V/sub th/), off-state leakage current (I/sub off/), subthreshold swing (SS), and drain-induced barrier lowering (DIBL). The saddle MOSFET showed less V/sub th/ sensitivity with the recess depth and at least 10/sup 3/ times higher I/sub on//I/sub off/ than conventional recess channel MOSFET. It was also shown that maximum lightly doped drain doping to guarantee I/sub off/ less than 1 fA is about 1.5/spl times/10/sup 19/ cm/sup -3/.