Fully implanted p-column InP field-effect transistor

P-column junction field-effect transistors (FET's) have been fabricated in semi-insulating InP utilizing an all-implanted planar technology. A periodic array of p+ columns implanted through an n-type channel layer is used to form the active region. Initial devices with nominal gate lengths of 4 µm exhibit a unity-power-gain frequency
f_{\max}
as high as 7 GHz while recent smaller gate length devices (nominally 1.7µm) show an
f_{\max}
of 16 GHz.