Design of a Micropower CMOS Four-Quadrant Multiplier Based on the Translinear Principle

This paper presents a novel design technique for low-distortion, micropower CMOS analog multipliers by adapting Gilbert's translinear principle to weak inversion. A non- linearity of 0.95% for input voltages of 0.5 V and power consumption of 84 μW have experimentally been obtained. The multiplier bandwidth is 30 Khz for a bias current of 370 ηA.