A compact analytical model for multi-island single electron transistors

Multi-island single electron transistor (SET) has become a promising candidate for the kernel device of the logic circuit in the near future. A novel compact analytical model for multi-island SET is proposed in terms of current. The new approach is based on the orthodox theory of single electron tunnelling and steady-state master equation. The model is accurate and fast compared with SIMON, and suitable for the ASIC design of multi-island SET circuit simulation.