Electrothermal gate and channel breakdown model for prediction of power and efficiency in FET amplifiers

A model of gate-junction leakage and impact ionization is used to predict catastrophic junction- and avalanche-breakdown mechanisms in a FET. It is shown that low-power DC measurements can be used to characterize breakdown and that the model correctly extrapolates to regions outside the safe-operating-area. When included in a large-signal FET model with dynamic calculation of junction temperature, the output power, power-added efficiency (PAE) and peak PAE of a common-source amplifier are well predicted.