A new perspective of barrier material evaluation and process optimization

A novel test structure based on a planar capacitor design has been used for advanced barrier material evaluation and process optimization. This structure enables intrinsic reliability study of Cu/low-k interconnects. Various barrier materials such as CuMn self-forming barrier, ALD Ru, and PVD TaNTa on different dielectric films have been investigated to understand their intrinsic limits of barrier performance. The learning generated from the novel test structure has been directly used for barrier optimization of dual damascene processes.