Low-voltage low-power double bulk mixer for direct conversion receiver in 65nm CMOS

An innovative design with simulation results of a low-voltage bulk driven mixer for direct conversion receiver is presented. The circuit is designed in a 65 nm digital CMOS process without analog extensions. It offers a conversion gain of 22 dB at a clock frequency of 1.5 GHz for GALILEO/GPS applications. The design is capable of operating at up to 7 GHz with only 3 dB gain decrease. The simulated noise figure is 27 dB with a power consumption of 730 muW. Simulations at a supply voltage of 0.9 V instead of 1.2 V show a gain decrease of only 3 dB while the noise figure increases by 2 dB.

I. Introduction

The market demands products with multiple applications. Therefore the rapid development in mobile transceiver systems raises the demand for them to be implemented in new technologies. Modern receiver systems always consist of an antenna, followed by a low noise amplifier (LNA), a mixer followed by a low-pass filter and a digital base band processing (figure 1). Possibly also an external surface acoustic wave (SAW) filter can be placed between antenna and LNA. Fig. 1. Receiver system