A programmable memory BIST for embedded memory

Recent development in System-on-Chip(SOC) technology makes it possible to incorporate large embedded memories into a chip. However, it also complicates the test process, since usually the embedded memories cannot be controlled from the external environment. Thus, the proposed scheme supports the various memory test algorithms to test different types of memory modules in SOC. Moreover, it is able to At-speed test in a memory module. Consequently, the proposed is more efficient in terms of test cost.