Analysis of low voltage rail-to-rail CMOS operational amplifier design

As the supply voltage to a standard CMOS op-amp is reduced, the input common mode range and the output swing get reduced drastically. Special circuits have to be used to raise them up to rail-to-rail supply voltage. This paper describes the design of a low-voltage CMOS rail-to-rail input output operational amplifier. Analysis of input signal compression circuitry that compresses rail-to-rail input signals to the input range of the following folded-cascode operational amplifier is done. The input signal compression circuitry and the following folded-cascode operational amplifier together comprise an input-output rail-to-rail operational amplifier. It is concluded that Cadence Spectre simulation tool with 0.18-μm CMOS validates the operation of the rail-to-rail CMOS amplifier with supply voltage of 1 V and bias current of 3.1 μA.