I. Introduction
Recently, 2-D digital filters are widely applied in a variety of digital signal processing (DSP) systems such as image restoration [1] obtained through a 2-D low-pass intraframe filter, image enhancement [2], [3] performed by a 2-D highpass filter and bio-medical signal processing [4]. Generally speaking, the category of 2-D digital filters can be divided into IIR and FIR digital filters. By contrast, an IIR digital filter has the advantage of highly computational efficiency and low hardware cost. An FIR digital filter has the merit of stable and linear-phase properties. Although 2-D digital filters can be simulated on a general-purpose computer, it seems unlikely to process input signals in real time due to a large amount of computation. Therefore, an application-specific integrated circuit (ASIC) design plays an important role for the realization of 2-D digital filters. Using ASIC approach, the throughput rate and cost can be easily sped up and alleviated, respectively. Several 2-D filter VLSI architectures have been existed in [7]–[11]. However, the existing ASIC approaches have not been applied to design 2-D transfer function possessing certain frequency response symmetries. On the other hand, the hardware evaluation metrics have not yet been debated. Thus, we are motivated to propose one new 2-D IIR and FIR filter with less number of multipliers using diagonal symmetry property [5], [6]. It is known that 2-D frequency responses possess many types of symmetries that can be used to reduce the design complexity and the implementation. In this paper, we choose diagonal symmetry scheme to determine 2-D VLSI architecture. Note that when the frequency response has no symmetry, there is a technique to decompose that frequency response into components each of which has the desired symmetry. As a consequence, there is a motivation to derive the 2-D diagonal-symmetry IIR and FIR filter architecture designs.