Abstract:
This paper explores the reliability of single-poly floating gates in 0.13 mum CMOS technology. Charge retention times before and after wear-out are measured. Channel inte...Show MoreMetadata
Abstract:
This paper explores the reliability of single-poly floating gates in 0.13 mum CMOS technology. Charge retention times before and after wear-out are measured. Channel interface degradation is evaluated through flicker noise measurements. The results show that deep submicron single-poly floating gates can store analog information with high precision for several months. While this disqualifies them from storing information for the life-time of a chip, it makes them a viable alternative to digital-to-analog converter arrays for tuning a set of parameters in field programmable analog arrays.
Published in: 2008 51st Midwest Symposium on Circuits and Systems
Date of Conference: 10-13 August 2008
Date Added to IEEE Xplore: 03 September 2008
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