Plasma induced damage of aggressively scaled gate dielectric (EOT ≪ 1.0nm) in metal gate/high-k dielectric CMOSFETs

Sample devices were fabricated with 2.0 nm SiO
₂
and 2.5-10.0 nm HfO
₂
. Transistor transconductance and gate leakage were used to evaluate PID. BTI and dielectric breakdown were measured to study the PID effect. For both nMOSFETs and pMOSFETs, the transconductance was degraded for the different antenna structures. It was found that, even below 0.9 nm of EOT range, the plasma charging damage was observed for various device parameters. This plasma damage can deteriorate the reliability of sub 32 nm metal gate/high-k dielectric CMOSFETs.