A 1.5V, wide-input range, high-bandwidth, CMOS four-quadrant analog multiplier

A low-voltage low-power CMOS four quadrant analog multiplier based directly on a cross-coupled squarer topology and suitable for the deep submicron technology is presented. Simulation results using 0.35-μm process parameters show that, when operated under a 1.5V single supply, the proposed multiplier consumes 290 μW of quiescent power, its linear range with respect to both differential input voltages is ±0.4 V and its bandwidth is about 100MHz.